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Design of bandwidth aware and congestion avoiding efficient routing algorithms for Network on Chip platforms
Jönköping University, School of Engineering, JTH, Computer and Electrical Engineering. Data-Och Electronik. Jönköping University, School of Engineering, JTH. Research area Embedded Systems. (Embedded Systems)
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2008 (English)In: The 2nd IEEE International Symposium on Networks-on-Chip: Symposium on Networks-on-Chip (NOCS 2008), 2008, p. 97-106Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
2008. p. 97-106
Keywords [en]
NoC, Routing, Application Specific
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Electrical Engineering, Electronic Engineering, Information Engineering
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URN: urn:nbn:se:hj:diva-5945ISBN: 978-0-7695-3098-7 (print)OAI: oai:DiVA.org:hj-5945DiVA, id: diva2:36765
Available from: 2008-09-10 Created: 2008-09-10 Last updated: 2009-02-16Bibliographically approved

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Holsmark, RickardKumar, Shashi

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CiteExportLink to record
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