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Design of bandwidth aware and congestion avoiding efficient routing algorithms for Network on Chip platforms
Palesi, Maurizio
Longo, G.
Signorino, S.
Holsmark, Rickard
Jönköping University, School of Engineering, JTH, Computer and Electrical Engineering. Data-Och Electronik. Jönköping University, School of Engineering, JTH. Research area Embedded Systems.
(Embedded Systems)
Kumar, Shashi
Jönköping University, School of Engineering, JTH, Computer and Electrical Engineering. Data-Och Electronik. Jönköping University, School of Engineering, JTH. Research area Embedded Systems.
(Embedded Systems)
Catania, V.
Show others and affiliations
2008 (English)
In:
The 2nd IEEE International Symposium on Networks-on-Chip: Symposium on Networks-on-Chip (NOCS 2008), 2008, p. 97-106
Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
2008. p. 97-106
Keywords [en]
NoC, Routing, Application Specific
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN:
urn:nbn:se:hj:diva-5945
ISBN:
978-0-7695-3098-7 (print)
OAI: oai:DiVA.org:hj-5945
DiVA, id:
diva2:36765
Available from:
2008-09-10
Created:
2008-09-10
Last updated:
2009-02-16
Bibliographically approved
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Holsmark, Rickard
Kumar, Shashi
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Kumar, Shashi
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JTH, Computer and Electrical Engineering
JTH. Research area Embedded Systems
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ieee
modern-language-association-8th-edition
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apa
ieee
modern-language-association-8th-edition
vancouver
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