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A VLSI design for universal Reed-Solomon erasure decoder
Jönköping University, School of Engineering, JTH. Research area Robust Embedded Systems. Jönköping University, School of Engineering, JTH, Computer and Electrical Engineering. (Data Communication)
Department of Information Technology and Media, Mid Sweden University.
2002 (English)In: Proceedings of the 6th International Conference on Signal Processing, ICSP’02, Beijing, China, Aug, 27-30, 2002, IEEE , 2002, p. 398-401Conference paper, Published paper (Refereed)
Abstract [en]

We present an encoding and decoding algorithm of universal Reed-Solomon codes for erasure decoding. It is shown that the algorithms can be implemented with simple, regular and modular circuits, naturally suitable for VLSI design. A typical example shows that the signal processing speed is in the order of Gbits/second and the processing delay is less than one millisecond, by the use of the decoders on a single chip. Here "universal" means that the same code and the same circuit design can be used for different code parameters, such as code length and code rate. Therefore, it can be utilized for different applications to recover lost message.

Place, publisher, year, edition, pages
IEEE , 2002. p. 398-401
Identifiers
URN: urn:nbn:se:hj:diva-10593ISBN: 0-7803-7488-6 (print)OAI: oai:DiVA.org:hj-10593DiVA, id: diva2:249044
Available from: 2009-10-09 Created: 2009-10-09 Last updated: 2010-03-09Bibliographically approved

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Xu, Youzhi

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