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HiRA: A methodology for deadlock free routing in hierarchical networks on chip
Jönköping University, School of Engineering, JTH, Computer and Electrical Engineering. Jönköping University, School of Engineering, JTH. Research area Robust Embedded Systems.
Jönköping University, School of Engineering, JTH, Computer and Electrical Engineering. Jönköping University, School of Engineering, JTH. Research area Robust Embedded Systems.
University of Catania, Italy.
Technical University of Valencia, Spain.
2009 (English)In: Networks-on-Chip, 2009. NoCS 2009. 3rd ACM/IEEE International Symposium on, IEEE Computer Society , 2009, p. 2-11Conference paper, Published paper (Refereed)
Abstract [en]

Complexity of designing large and complex NoCs can be reduced/managed by using the concept of hierarchical networks. In this paper, we propose a methodology for design of deadlock free routing algorithms for hierarchical networks, by combining routing algorithms of component subnets. Specifically, our methodology ensures reachability and deadlock freedom for the complete network if routing algorithms for subnets are deadlock free. We evaluate and compare the performance of hierarchical routing algorithms designed using our methodology with routing algorithms for corresponding flat networks. We show that hierarchical routing, combining best routing algorithm for each subnet, has a potential for providing better performance than using any single routing algorithm. This is observed for both synthetic as well as traffic from real applications. We also demonstrate, by measuring jitter in throughput, that hierarchical routing algorithms leads to smoother flow of network traffic. A router architecture that supports scalable table-based routing is briefly outlined.

Place, publisher, year, edition, pages
IEEE Computer Society , 2009. p. 2-11
Keywords [en]
deadlock free routing, hierarchical networks, hierarchical routing algorithms, network-on-chip
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering Computer Sciences
Identifiers
URN: urn:nbn:se:hj:diva-10928DOI: 10.1109/NOCS.2009.5071439ISBN: 978-1-4244-4142-6 (print)OAI: oai:DiVA.org:hj-10928DiVA, id: diva2:278436
Available from: 2009-11-26 Created: 2009-11-26 Last updated: 2018-01-12Bibliographically approved

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Publisher's full texthttp://ieeexplore.ieee.org/search/srchabstract.jsp?arnumber=5071439&isnumber=5071428&punumber=5066987&k2dockey=5071439@ieeecnfs&query=%28+holsmark+r.%3Cin%3Eau%29&pos=2&access=no

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Holsmark, Rickardkumar, Shashi

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